About Dr. Yuke Wang (CV)

06/10/03

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Dr. Yuke Wanga

Associate Professor

Department of Computer Science

University of Texas at Dallasbit of and

yuke@utdallas.edu

 

Highlights and Summary in Numbers

Ph. D. received in May 1996 (1996-2002)

 

Editor positions

4

Conference committee positions

7

Invited papers

3

Journal papers published/accepted

20

IEEE/ACM Transactions papers

15

Conference papers

40

Visiting Professor positions

3

Total grants (individual and team grants)

$600k

Total number of courses taught

19

Total number of different courses taught

12

Total number of students taught in classroom

680

Average number of courses per year

>3

Average number of different courses per year

2

Last term’s teaching evaluation mark (5 = full mark)

4.55

Total number of Ph.D./post-doctoral graduates

2

Total number of M. Sc. graduates (thesis option)

4

Current Ph. D. students

4

Current M. Sc. students (thesis option)

3

 

Biography

Identification

Dr. Yuke Wang

Erik Jonsson School of Engineering and Computer Science

Computer Science Department

The University of Texas at Dallas

Mail Station EC 31

P.O. Box 830688

Richardson, TX 75083-0688

Email: yuke@utdallas.edu

Tel. 972-883-4139

 

Education History

Ph. D. – May 1996, University of Saskatchewan, Saskatoon, Saskatchewan, Canada. Computer Science.

M. Sc. – May 1992, University of Saskatchewan, Saskatoon, Saskatchewan, Canada, Mathematics.

B. Sc. - July 1989, University of Science and Technology of China, Hefei, China, Mathematics.

 

Employment History – Principal Positions

Associate Professor, September 2000 – now, University of Texas at Dallas, TX.

Assistant Professor, 1999, 9 - 2000, 6 Florida Atlantic University, FL

Assistant Professor, 1996, 6 - 1999, 5 Concordia University, Canada

Post-Doctoral Fellow, 1995, 9 - 1996, 5 University of Montreal, Canada

Programmer Analyst, 1993, 6 - 1993, 9 SED System Inc., Saskatoon, Canada

 

Employment History – Visiting Positions

Visiting Assistant Professor, May 2002- August 2002, Stanford University

Visiting Assistant Professor, May 2001- August 2001, University of California at Berkeley.

Visiting Assistant Professor, August 2000, University of Maryland, College Park

Visiting Assistant Professor, June 2000 – July 2000, University of Minnesota. MN.

Visiting Assistant Professor, 1999, 6 - 1999, 8 University of Minnesota, MN.

 

Professional Recognitions – honors, memberships Editor Positioins

IEEE Transactions on VLSI, published by IEEE Circuits and Systems Society.

IEEE Transactions on Circuits and Systems, published by IEEE Circuits and Systems Society.

Journal of Circuits, Signals, and Systems, published by Birkhäuser Boston.

Journal of Applied Signal Processing, published by Hindawi Publishing Corporation.

International Journal of Parallel and Distributed Systems & Networks, published by ACTA Press.

 

Seminars

McGill University May 1996

Stanford University November, 1998

UC Santa Barbara November, 1998

University of Windsor November, 1998

University of Minnesota December, 1998

Osaka University, Japan December, 1998

University of Victoria January, 1999

Iowa State University April 1999

University of New Mexico July 1999

University of Notre Dame August 1999

University of Maryland August 2000

Stanford University August 2001

 

External funding for original investigations

(1) Boolean Function Manipulation and Representation , PI Dr. Yuke Wang, Faculty Research Development Start-up Grant Concordia University, 1996-1999, $45,000.

(2) "Data Structures and Algorithms for Boolean Functions and Arithmetic Functions in VLSI design", PI Dr. Yuke Wang, National Science and Engineering Research Council of Canada (NSERC, equivalent to NSF), 1997-2001, $61,600

(3) "VLSI Design of Residue Arithmetic Circuits" PI Dr. Yuke Wang, FCAR Nouveaux Chercheurs , FCAR (Quebec Funding agency, equivalent to CAREER award), 1998-2001, $43,800.

(4) Equipment for VLSI research , PI Dr. Yuke Wang, Concordia Engineering Faculty Infrastructure Support, 1998, $9,647.

(5) Apply logic synthesis for Image compression , PI Dr. Yuke Wang , Concordia Engineering Faculty CARA fund, 1998, $6,000.

(6) CMC Equipment Competition, PIs, Dr. Yuke Wang, et. al., $32,625, 1997-1998,

(7) Development of Algorithms and Architecture for Signal and Image Processing with Applications , PIs, Dr. Swamy, Dr. Ahmad, Dr. Raut, Dr. Yuke Wang, Dr. Plotkin, FCAR team grant, 1997-2000, $114,390.

(8) FIR Filter Design for Wireless Communications , PIs Dr. Yuke Wang, Dr. Swamy, Dr. Ahmad, Micronet, $20,000, 1998-1999,

(9) Implementation and evaluation of DSP processors , PIs Dr. Edwin Sha, Dr. S.Q.Zheng, Dr. Yuke Wang, Texas Instruments, December 2000, $49,514.00.

(10) "DSP Processor Evaluation", PI Dr. Yuke Wang, Analog Device Inc., September 2001, $30,000, Equipment grant.

(11) "Design, Implementation, and Evaluation of Network Processors for IPv6", - PI Dr. Yuke Wang, Alcatel, January 2002, $30,000.

(12) "Integrated Solutions to assure IP QoS", Alcatel, July, 2002, $80,000, - PI Dr. Yuke Wang,

 

 

 

Publications

Invited Papers

[I1] C. McCrosky and Yuke Wang, "Boolean functions", Encyclopedia of Electrical and Electronics Engineering, John Wiley & Sons, Inc., Edited by John Webster, December 1997.

[I2] Yuke Wang and Keshab Parhi, "A new low power Adder", Asilomar Conference on Signals, Systems, and Computers, Monterey, CA, November, 2000.

[I3] Yuke Wang, and Keshab Parhi, "A unified adder", Asilomar Conference on Signals, Systems, and Computers, Monterey, CA, November, 2001.

 

Articles in refereed journals

[J1] Yuke Wang and Mostafa Abd-el-Barr, "A New algorithm for RNS decoding", IEEE Transactions on Circuits and Systems-I Vol. 43, No. 12, pp. 998 –1001, December 1996.

[J2] Yuke Wang and Carl McCrosky, "Negation trees: a unified approach to Boolean function complementation", IEEE Transactions on Computers, Vol. 45, No. 5, pp. 626-630, May 1996.

[J3] Yuke Wang, M. Abd-el-Barr, and C. McCrosky, "A new algorithm for symmetric OBDD", IEEE Transactions on Computers, Vol. 46, No. 6, pp. 731 -733, June 1997.

[J4] Yuke Wang and C. McCrosky, "Solving Boolean equations using ROSOP forms", IEEE Transactions on Computers, Vol. 47, No. 2, pp. 171 –177, February 1998.

[J5] Xiaoyu Song and Yuke Wang, "On the crossing distribution problem", ACM Transactions on Design Automation of Electronic Systems, Vol. 4, No. 1, pp. 39-51, January 1999.

[J6] Yuke Wang, M. Swamy, O. Ahmad, "Residue-to-binary number converters for three moduli sets", IEEE Transactions on Circuits and Systems - II, Vol. 46, No. 2, pp. 180-183, February, 1999.

[J7] Y. Tang, X. Song, Yuke Wang, "Diagnosis of clustered faults for identical degree topologies", IEEE Transactions on Computer-Aided Design, Vol. 18, No. 8, pp.1192 –1201, August 1999.

[J8] H. Shen, D. Evans, W. Liang, Yuke Wang, "Efficient multiple multicast in WDM networks", IEICE Trans. on Information Systems, Vol. E82-D, No. 6, pp. 1074 –1078, August 1999.

[J9] Yuke Wang, "Residue-to-binary converters based on New Chinese Remainder Theorems", IEEE Transactions on Circuits and Systems - II., Vol. 47, No. 3, pp. 197-206, March, 2000.

[J10] X. Song,Y. Tang, D. Zhou, and Yuke Wang, "Wire space estimation and routability analysis for gate array chips", IEEE Transactions on Computer-Aided Design, Vol. 19 No. 5 , pp. 624 –628, May 2000.

[J11] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "A high speed residue-tobinary converter and a scheme for its VLSI implementation", IEEE Transactions on Circuits and Systems - II, Vol 47, No. 12, pp. 1576 –1581, December 2000.

[J12] Yuke Wang, C. McCrosky, and X. Song, "Single-faced Boolean functions and their minimization", The Computer Journal, Vol. 44, No. 4. pp. 280-291, April 2001.

[J13] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "A parallel residue-tobinary converter", accepted by VLSI Design, an International Journal of Customchip design, simulation, and testing, January 2001.

[J14] Yuke Wang, X. Song, M. Aboulhamid, H. Shen, "Near-optimal residue to binary converter for the moduli ", accepted by IEEE Transactions on Signal Processing, August 2001.

[J15] Abdul Karim Al-Sheraidah, Y. Jiang, Yuke Wang, and Edwin Sha, "A novel low power multiplexer-based full adder", accepted by IEEE Trans. on Circuits and Systems – II, September, 2001.

[J16] H. Bui, Yingtao Jiang, and Yuke Wang, "Design and analysis of 10-transistor full adders using novel Xor-Xnor gates", accepted by IEEE Trans. on Circuits and Systems – II, September, 2001.

[J17] Y. Jiang, Yuke Wang, Y. Savaria, and X. Song, "Evaluating the output probability of Boolean functions without float point operations", accepted by VLSI Design, an International Journal of Custom-chip design, simulation, and testing, September 2001.

[J18] Yuke Wang, C. Pai, and Xiaoyu. Song, "The design of hybrid carry lookahead/ carry-select adders", accepted by IEEE Trans. on Circuits and Systems –II, October, 2001.

[J19] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "Comprehensive VLSI study of residue -binary arithmetic conversion", accepted by IEEE Transactions on Computers, January 2001.

[J20] Zhong Wang, Edwin Sha, and Yuke Wang, "Partitioning and scheduling DSP applications with maximal memory access hiding", accepted by Applied Signal Processing Publication in Referred

 

Submitted for publication

[J21] Abdul Karim Al-Sheraidah, Y. Jiang, and Yuke Wang, "High performance Multiplexer-based full adder circuit architectures", submitted to IEEE Trans. on VLSI, April, 2001.

[J22] Hung Tien Bui, Abdul Karim Al-Sheraidah, and Yuke Wang, "New 4-transistor XOR and XNOR designs", submitted to IEEE Trans. on VLSI, April 2001.

[J23] Yuke Wang, Xiaoyu Song, M. Aboulmid, E. Cerny," Discrete timing scheduling under real-time constraints", submitted to Theoretical Computer Science, April 2001.

[J24] Y. Jiang, Yuke Wang, and Edwin Sha, "Power evaluation of CMOS full adder circuits", submitted to IEEE Trans. on Circuits and Systems-II

[J25] A. Skavantzos and Yuke Wang, "Application of New Chinese Remainder Theorems to two pairs conjugate moduli sets", submitted to IEEE Trans. on Signal Processing,

[J26] Yingtao Jiang, Yuke Wang, Edwin Sha, "Distributed scaling algorithm for large FFT computation using fixed-point arithmetic", submitted to IEEE Trans. on Signal Processing,

[J27] Mei Yang, Yuke Wang, Jinchu Wang, and S.Q. Zheng, "Optimized parallel implementation of polynomial approximation mathematical functions on a DSP processor", submitted to IEEE Transactions on Parallel and Distributed Systems.

[J28] Yuke Wang, Keshab. Parhi, "Explicit Cook-Toom algorithm for linear convolution", submitted to IEEE Trans. on Signal Processing.

 

Conferences

[C1] E. Cerny, Yuke Wang, M. Aboulmid, " Discrete timing scheduling under real-time constraints", Journees Bordelaises ordres partiels et algorithmes distribues, Bordeaux, France, June 1997.

[C2] E. Cerny, Yuke Wang, M. Aboulhamid, " Discrete timing scheduling for time diagrams", IFIP INTERNATIONAL WORKSHOP ON LOGIC AND ARCHITECTURE SYNTHESIS (IWLAS’97), Institut National Polytechnique de Grenoble, France, December 16-18, 1997

[C3] Yuke Wang, X. Song, M. Aboulhamid, "Near-optimal residue to binary converter for the moduli ", 8TH Great Lakes Symposium on VLSI, Lafayette, Louisiana, February 19-21, 1998

[C4] Yuke Wang, M. N. Swamy, O. Ahmad, "Three number moduli sets based residue number systems", 1998 IEEE International Symposium on Circuits and Systems, Monterey, California, USA, May 31-June 3, 1998.

[C5] X. Song, Yuke Wang, "On the board level routing problem for FPGA-based logic emulation", IEEE 1998 Canadian conference on Electrical and computer engineering, Waterloo, Ontario, Canada, May 1998.

[C6] Yuke Wang, T. Le-Ngoc, "An improved VLSI design for adaptive equalizer based residue number systems", IEEE International Symposium on Wireless Communications , Montreal, Canada , May 1998.

[C7] Yuke Wang, "A residue to binary converter based on New Chinese Remainder Theorem I", Third International Conference on ASIC, Beijing, China, October 20-23, 1998.

[C8] Yuke Wang, "New Chinese Remainder Theorem with applications for DSP", the Thirty second annual Asilomar Conference on Signals, Systems, and Computers, USA, November 1 - November 4, 1998.

[C9] Yuke Wang, "Parallel implementation of the New Chinese Remainder Theorems",

the Second IASTED International conference on Parallel and Distributed Computing and Networks, December, 1998, Australia

[C10] J. Augustine, W. Lynch, Yuke Wang, and Asim Al-Khalili,"Lossy compression of images using logic minimization", the Twelfth International Conference on VLSI design, Goa, India, January 7-10, 1999.

[C11] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "A parallel residue-tobinary converter", International Conference on Acoustics, Speech, and Signal Processing, Arizona, US, March 1999.

[C12] Yuke Wang, X. Song, M. Aboulmid, "New residue number comparison algorithm", 9th Great Lakes Symposium on VLSI, Michigan, US, March 1999.

[C13] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "A high speed residue-tobinary converter and a scheme for its VLSI implementation", IEEE International Symposium on Circuits and Systems, Florida, US, June 1999.

[C14] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang, "Comprehensive VLSI study of residue -binary arithmetic conversion", Canadian conference on Electrical and computer engineering. Alberta, Canada, May 1999.

[C15] Wei Wang, M. N. S. Swamy, O. Ahmad, Yuke Wang,"New Chinese Remainder Theorems applications to special moduli sets", Canadian conference on Electrical and computer engineering, Alberta, Canada, May 1999.

[C16] Y. Jiang, Y. Tang, Yuke Wang, and Y. Savaria, "Evaluating the output probability of Boolean functions without float point operations", Canadian conference on Electrical and computer engineering, Alberta, Canada, May 1999.

[C17] A. Skavantzos and Yuke Wang, "Application of New Chinese Remainder Theorems to two pairs conjugate moduli sets", IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, Victoria, Canada, August, 1999.

[C18] A. Skavantzos and Yuke Wang, "New efficient RNS-to-weighted decoders for conjugate pair moduli residue number systems", Asilomar Conference on Signals, Systems, and Computers, October 1999.

[C19] Yuke Wang, Keshab. Parhi, "Explicit Cook-Toom algorithm for linear convolution", International Conference on Acoustics, Speech, and Signal Processing, Turkey, June 2000.

[C20] H. Bui, K. Al-sheraidah, and Yuke Wang, "Design and analysis of 10-transistor full adders using novel Xor-Xnor gates", International Conference on Signal Processing 2000, Wold Computer Congress, Beijing, China, August 2000.

[C21] Y. Jiang, Y. Wang and J. Wu, "Physical design and evaluation of low-power CMOS full adders," Proc. Int. Conf. On Chip Design Automation 2000, Beijing, China, Aug. 2000.

[C22] Yuke Wang, "New Chinese Remainder Theorems for polynomials", The 13th International Conference on Parallel and Distributed Computing Systems , Las Vagas, August 2000.

[C23] Yuke Wang, Rolf Drechsler , and Xiaoyu Song, Optimal symmetry detection for OKFDDs Middle West Symposium on Circuits and Systems, Michigan, August 2000.

[C24] Hung Tien Bui, Abdul Karim Al-Sheraidah, and Yuke Wang, "New 4-transistor XOR and XNOR designs", Asia Pacific ASIC design, South Korea, August 2000.

[C25] Yuke Wang and Keshab Parhi, "A new low power Adder", Asilomar Conference on Signals, Systems, and Computers, Novermber 2000.

[C26] C. Yeh, B. Parhami, and Yuke Wang, "Designs of counters with near minimal couting/sampling period and hardware complexity", Proc. 34th Asilomar Conference of Signals, Systems, and Computers, Pacific Grove, CA 2000, Oct. 29-Nov. 1.

[C27] Z. Wang, E. Sha, and Yuke Wang, "Optimal partitioning and balanced scheduling with maximal overlap of data footprints", ACM 11th Great Lake Symposium on VLSI, West Lafayette, USA, March 22-23, 2001.

[C28] Wade Trappe, Yuke Wang, Ray, Liu, "Group key agreement using divide-and conquer strategies", 2001 Conference on Information Sciences and Systems, March, 2001.

[C29] Abdul Karim Al-Sheraidah, Y. Jiang, and Yuke Wang, "A set of novel Multiplexer-based architectures for full adder designs", 5th WSES/IEEE conference on circuits, systems, and communications, Crete, Greek, July 8-15.

[C30] Yiyan Tang, Y. Jiang, and Yuke Wang, "Cache-sorting-based CAM for VPI/VCI translation in ATM switch", 5th WSES/IEEE conference on circuits, systems, and communications, Crete, Greek, July 8-15.

[C31] Yingtao Jiang, Yuke Wang, Edwin Sha, "Distributed scaling algorithm for large FFT computation using fixed-point arithmetic", The 14th International Conference on Parallel and Distributed Computing Systems Radisson Hotel Richardson, Dallas, Texas, USA, August 8 - 10, 2001.

[C32] Y. Jiang, Y. Wang, and A. Skavantzos, "A label search chip with cache-based CAM architecture," accepted by 44th Midwest Symposium on Circuits and Systems, Dayton, Ohio, Aug. 2001.

[C33] Abdul Karim Al-Sheraidah, Y. Jiang, and Yuke Wang, "A novel low power Multiplexer-based full adder", European Conference on Circuit Theory and Design, 2001 E C C T D ‘ 0 1 "Circuit Paradigm in the 21st Century", Espoo, Finland, 28-31 August, 2001.

[C34] Y. Jiang, Y. Wang and E. Sha, "On low-power array multipliers," accepted by 8th International IEEE Conference on Electronics, Circuits, and Systems (ICECS’01), Malta, Sept. 2001.

[C35] Yuke Wang, Y. Jiang and E. Sha, "A comprehensive power evaluation of CMOS full adders," accepted by ISIC-2001 (9th Int. Symposium on Integrated Circuits, Devices & Systems), Singapore, Sept. 2001.

[C36] Y. Tang, Y. Jiang, and Y. Wang, "Distributed cache-sorting-based CAM architecture for MPLS over ATM," accepted by Proc. 4th Int. Conf. On ASIC (ASICON), Shanghai, China, Oct. 2001.

[C37] Yingtao Jiang, J. Ma, A. Saidi and Yuke Wang, "Parallel Turbo decoder using a low latency Max-Log-MAP kernel for a VLIW DSP," Proc. SPIE Asia-Pacific Optical and Wireless Communications’01 (APOC 2001), Beijing, China, Nov. 2001.

[C38] Y. Tang, Yingtao Jiang and Yuke Wang, "Scalable CAM-based search engine for MPLS over ATM Networks," Proc. GLOBECOM 2001, San Antonio, Texas, Nov. 2001.

[C39] Mei Yang, Yuke Wang, Jinchu Wang, and S.Q. Zheng, "Optimized parallel implementation of polynomial approximation mathematcial functions on a DSP processor", Midwest Symposium on Circuits and Systems, 2001, August 14-17, Ohio.

[C40] Yuke Wang, and Keshab Parhi, "A unified adder", invited paper, Asilomar Conference on Signals, Systems, and Computers, November 2001.

[C41] M. Yang, Yuke Wang, J. Wang, S. Zheng, "Optimized scheduling and mapping of logarithm and arctangent functions on TI TMS320C67x processors", Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Orlando, Florida, USA, May 2002.

[C42] Yingtao Jiang, Tian Zhou, Yiyan Tang and Yuke Wang, "Twiddle-Factor- Based FFT Algorithm with Reduced Memory Access", Proc. International Paralleland Distributed Processing Symposium, Fort Lauderdale, Florida, April 2002.

[C43] Yingtao Jiang, Yiyan Tang, and Yuke Wang, "Transforming FFT Structures for Minimized Memory Reference", Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Orlando, Florida, USA, May 2002.

[C44] Yingtao Jiang, Yiyan Tang, and Yuke Wang, "A High Speed DSP-Based TURBO CODEC For 3rd Generation Mobile Communication System", Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Orlando, Florida, USA, May 2002.

[C45] Yiyan Tang, Yingtao Jiang, Yuke Wang, and M. N. S. Swamy, "A Trace-Back-Free Viterbi Decoder Using A New Survival Path Management Algorithm", Proc. IEEE International Symposium on Circuits and Systems (ISCAS), Scottsdale, Arizona, May 2002.

[C46] Wade Trappe, Yuke Wang, Ray, Liu, "Establishment of Conference Keys in Heterogeneous Networks", International Conference on Communications, April 28-May 2, 2002, New York, USA

 

Teaching

Doctoral advisement/direction

(1) Dr. Yingtao Jiang,  University of Texas at Dallas, August 2001. Currently, Dr. Jiang is an Assistant Professor at University of Nevada at Las Vegas.

(2) Dr. Wei Wang, Concodia University, Canada, 2002. Currently, Dr. Wang is an Assistant Professor at University of Western Ontario.

 

Masters advisement/direction

(3) Mr. M. Dalal, "Physical Layout Tools and Algorithms", Concordia University, May 1997 - April 1998.

(4) Ms. D. Surti, "Design of Residue Arithmetic Circuits", Concordia University, May 1997 - April 1998.

(5) Mr. T. Bui, "Design of 10-transistor low power full adders", Florida Atlantic University, September 1999.

(6) Mr. Abdul-Karim Al-Sheraidah, Novel Multiplexer-based architectures for full adder design , Florida Atlantic University, January 2000.

 

Current Ph. D. students

(7) Ms. Y. Zhang - 3G wireless communication implementation issues.

(8) Mr. Tim Triley - DSP processors architecture.

(9) Mr. Yiyan Tang - DSP processor architectures.

(10) Mr. Anand Krishnamurthy - DSP processor architectures.

 

Post-doctoral Fellow supervised

(11) Dr. J. Augustine , Application of logic synthesis to image compression , Post-doctoral, Concordia University, February 1998— January 1999.

 

Ph.D. advising committee

(12) Dr. C. Savin, Signal estimation techniques using Lp-Norm optimal stack filters with applications to image and video processing , September 5, 1997, Concordia.

(13) Dr. S. Shehata, High level synthesis of digital signal processing cores targeting FPGA s. , September 26, 1997, Concordia University

(14) Dr. J. Said, Automatic processing of documents and bank cheques ,January 9, 1998, Concordia University

(15) Mr. R. Mehler, "Architectural Synthesis of Finite Impulse Response Digital Filters , University of Texas at Dallas, ongoing.

 

Classroom Teaching

Academic Year Class Number of Students

1996/97

Undergraduate

Digital System Design 38 students

 

 

Digital System Design 60 students

 

Graduate

Introduction to VLSI system 25 students

 

 

 

1997/98

Undergraduate

Laplace Transforms and 58 students

 

 

Advanced Differential Equations

 

 

Sequential circuits 57 students

 

 

Introduction to VLSI design 9 students

 

Graduate

Computational Algorithms for 7 students

 

 

VLSI design

 

 

 

1998/99

Undergraduate

Digital System Design 57 students

 

 

Digital System Design 70 students

 

Graduate

Introduction to VLSI system 25 students

 

 

 

1999/00

Undergraduate

Design and Analysis of Algorithms 15 students

 

 

File Organize Method 20 students

 

 

Introduction to Object -Oriented Sys. 47 students

 

Graduate

Custom VLSI design 7 students

 

 

 

2000/01

 

Computer Architecture 34 students

 

 

Design and Implementation of DSP algorithms 20 students

 

 

 

2001/02

Graduate

Computer Architecture 46 students

 

 

Computer Networks 60 students

 

 

DSP architecture 25 students

Total number of students 680 students

Total number of different courses 12 courses

Average new courses taught each year 2 courses

 

Administration and curricular development

Program Committee of Conferences

(1) First International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2000), Hong Kong, May 22-24, 2000.

(2) IASTED International Conference on Signal Processing and Communications, Malaga, Spain, September 19-22, 2000.

(3) Second International Conference on Parallel and Distributed Computing, Applications, and Techniques (PDCAT 2001) , Taipei, Taiwan, July 9-11, 2001.

(4) IASTED International Conference on Advances in Communications Rhodes, Greece, July 3-6, 2001.

(5) 14th International Conference on Parallel and Distributed Computing Systems, Dallas/Richardson, Texas USA, August 8-10, 2001.

(6) Third International Conference on Parallel and Distributed Computing, Applications, and Technologies (PDCAT 2002), Kanazawa City, Japan, September 2-4, 2002.

(7) IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, 26 May 2002 - 29 May 2002

 

Session Chair

(1) Second IASTED International conference on Parallel and Distributed Computing and Networks, December, 1998, Australia;

(2) IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, 1999;

(3) Canadian Conference on Electrical and Computer Engineering, 1999, Edmonton, Canada.

 

Referee of

(1) International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2000)

(2) IASTED International Conference on Signal Processing and Communications, Malaga, Spain, September 19-22, 2000.

(3) Second International Conference on Parallel and Distributed Computing, Applications, and Techniques (PDCAT 2001) , Taipei, Taiwan, July 9-11, 2001.

(4) IASTED International Conference on Advances in Communications Rhodes, Greece, July 3-6, 2001.

(5) 14th International Conference on Parallel and Distributed Computing Systems, Dallas/Richardson, Texas USA, August 8-10, 2001.

(6) Third International Conference on Parallel and Distributed Computing, Applications, and Technologies (PDCAT 2002), Kanazawa City, Japan, September 2-4, 2002.

(7) VLSI Great Lake Symposium, 2000, 20001.

(8) International Conference on Computer Aided Design, 1997

(9) IEEE International Symposium on Circuits and Systems, 2000, 2001, 2002

(10) IEEE International Conference on Acoustics, Speech, and Signal Processing, 2000, 2001

(11) IEEE SiPS conference

(12) Applied Signal Processing

(13) IEEE Transaction on Computers,

(14) IEEE Trans. on Circuits and Systems,

(15) IEEE Transactions on Signal Processing,

(16) IEEE Signal Processing Letter,

(17) Journal of Parallel and Distributed Computing

(18) Encyclopedia of Electrical and Electronics Engineering, John Wiley & Sons,

(19) International Journal on computers and electrical engineering,

(20) Journal of circuits, systems, and computers

(21) Journal of VLSI Signal Processing

 

IEEE services

IEEE Student Branch Counselor for Concordia University 1997/99.

Circuits and System Dallas Chapter Treasurer, Dallas.

Vice Chair of the Computer Society Dallas Chapter, Dallas.

Member of the Consulting Network Dallas Chapter, Dallas.

 

University Services

(1) January 2000 – April 2000, Chair selection committee, Department of Computer Science, Florida Atlantic University, to select a new chair for the department.

(2) September 2000 – now, Grad. admission and TA committee, Department of Computer Science, University of Texas at Dallas, to admit M. Sc. and Ph. D. students and to assign Teaching Assistantship to qualified students.

(3) April 2001 – now, Computer Engineering Committee, Department of Computer Science, University of Texas at Dallas, to jointly manage the computer engineering program in the college.

(4) September, 2001 – now, Faculty recruiting committee, Department of Computer Science, University of Texas at Dallas, to recruit new faculty members.

 

Community Service

(1) Faculty advisor for the Chinese Student Association in UTD, September 2001

(2) Judge for Science Fair in Montreal, Canada, September 1996.

 

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