Scaling of IC technologies has increased the level of integration of electronic systems in the past decades, leading to higher operating speeds and lower power consumption. This has enabled designers to envision mobile and high performance computing systems with energy efficiencies previously considered science fiction. However, scaling has introduced a variety of non-idealities including device mismatch, process variation, and reduced supply voltage, all of which sacrifice the accuracy and dynamic range of analog and mixed-signal circuits that provide electronic interfaces to the world. These reductions in accuracy inevitably incur cost in power, speed, and design area. Future scaling of nano-electronics and post-cmos devices promises to rely even more on switching devices, leaving analog and mixed signal components to suffer from lower accuracy and poorer performance.
Although scaling has generally benefited CMOS designers, this talk will consider some of the problems resulting from scaling such as process variation, noise, and reduced analog performance. I will offer examples of solution methodologies and discuss trade-offs that might be achieved through use of promising design techniques such as stochastic design, redundancy, and single point calibration. Finally, I will explore the limits of these approaches and more fundamental shifts to new signaling paradigms to extend the life of mixed signal CMOS and allow front-end functions like RF communication and biosensing to scale with back end processors and memories.
Alyssa Apsel received the B.S. from Swarthmore College in 1995 and the Ph.D. from Johns Hopkins University, Baltimore, MD, in 2002. She joined Cornell University in 2002, where she is currently an Associate Professor of Electrical and Computer Engineering. The focus of her research is on power-aware mixed signal circuits and design for highly scaled CMOS and modern electronic systems. She has authored or coauthored over 90 refereed publications in related fields of RF mixed signal circuit design, interconnect design and planning, photonic integration with VLSI, and process invariant circuit design techniques resulting in five patents and several pending patent applications. She received a best paper award at ASYNC 2006, had a MICRO “Top Picks” paper in 2006, received a college teaching award in 2007, received the National Science Foundation CAREER Award in 2004, and was selected by Technology Review Magazine as one of the Top Young Innovators in 2004. She has also served as an Associate Editor of various journals including IEEE Transactions on Circuits and Systems I and II and is the chair of the Analog and Signal Processing Technical committee of ISCAS 2011.