One of the major problems associated with integrated DC-DC converters used in state of the art PMICs is dynamic performance and stability degradation due to off-chip component and output current variations. The first part of the presentation will introduce some of our earlier work on load inductor self-test and associated lossless load current sensing techniques. A high accuracy built-in self-test (BIST) architecture measuring load inductance and DC resistance (DCR) of DC-DC converters is presented. The DCR measurement of the inductor also enables continuous, lossless average load current sensing of the DC-DC converter across the inductor. The BIST module can measure filter inductance values ranging from 3.6mH to 22.3mH range with average 2.0% error and inductor DCR 13mW to 68mW range with average 2.1% error. The average current sensing enabled by the BIST technique achieves current measurement accuracy with average 2.3% error for 0.1A-1A range load current. BIST and current sensing modules occupy less than 6% of total chip area. The BIST circuitry is fabricated and tested with a 12V input, 1V-11.5V output range, for a 3W output power digital DC-DC converter. The second part of the presentation will focus on minimizing power train related losses with discrete FET based DCDC converters. Dead-time power loss at heavy load and gate charge power loss at light load are two main mechanisms related to output power stage losses. Two mixed-signal adaptive algorithms have been proposed to improve the efficiency of the power train: adaptive dead-time control and adaptive gate-drive control. Proposed on-line mixed-signal adaptive calibration method monitors the switching node voltage and fine-tunes the dead-time with a digital delay line. For the gate drive, the gate driver power supply is scaled with the load current requirements. Based on above concepts, a switch-mode DC-DC buck controller prototype with an external NMOS power train have been designed and fabricated with 0.5um BiCMOS process. The proposed switching converter can operate up to 20V input voltage, with a 1MHz switching frequency. For a 1.5V output, 10A loading, 1MHz switching frequency, the proposed techniques reduce power train drive and deadtime losses by 0.52W, improving the overall efficiency by up to 2.2%.
Dr. Bakkaloglu received his PhD from Oregon State University in 1995 and joined Texas Instruments Inc. Mixed Signal Wireless Design Group, Dallas, TX, where he worked on system-on-chip designs with audio, integrated battery management, RF, analog baseband functionality as a design leader. In 2004 he joined the Electrical Engineering Department at Arizona State University, Tempe, AZ, as an associate professor. His research interests include supply regulators, biomedical, chemical instrumentation and MEMS interface circuits, frequency synthesizers, high speed and audio data converters and mixed signal built-in-self-diagnostic circuits for communication. Dr. Bakkaloglu is the technical program chair and steering committee member for IEEE RFIC conference, and was a program committee member for IEEE Workshop on Circuits and Systems for Medical and Environmental Applications. He was an associate editor of IEEE Transactions on Circuits and Systems and he is currently an associate editor for IEEE Transactions on Microwave Theory and Techniques.