“Designing Analog and RF Circuits in Nanoscale CMOS Technologies:
Scale the Supply, Reduce the Area and Use Digital Gates”
Peter Kinget, Columbia University
Friday, Nov. 20, 2009, 10 a.m., (ECSS 2.412)

Abstract
Peter Kinget will discuss his group’s recent research centered around three themes aimed at designing analog and RF interface circuits in digital nanoscale CMOS processes. Design techniques for analog and RF circuits operating well below 1V can keep them compatible with future low-power SOCs. Reclaiming the space under inductors is necessary to reduce area and cost. Digital gates can facilitate self-calibration for RF front ends to improve performance and simplify design.

Bio
Peter Kinget received an undergraduate degree in electrical and mechanical engineering and a Ph.D. in electrical engineering from the Katholieke Universiteit Leuven in Belgium. He worked in industrial research and development at Bell Laboratories, Broadcom, Celight and Multilink before joining the Department of Electrical Engineering at Columbia in 2002. His research interests are in analog and RF integrated circuits and signal processing using nanoscale CMOS technologies.