Neuro-inspired Devices
The development of a neuro-inspired architecture on a silicon CMOS platform could enable accelerated increases in functionality beyond the limits of CMOS-only binary computers and for the processing of sensor inputs from future system-on-a-chip designs with low power consumption. There are two primary issues limiting the rate of information processing exhibited by neuro-inspired circuits: the density of synapses/neurons, and the lack of fan-out to the extent exhibited within the brain. The primary objectives of this research are to develop synapses, axons and dendrites within CMOS interconnect layers toward an “ultimately scaled” neuro-inspired architecture on a silicon platform. These devices will require development of advanced materials (e.g., nanowires in non-crystalline silicon, metal nanowires and atomic layer deposited dielectrics) to achieve neuro-inspired specifications. Neuro-inspired devices will be fabricated, and the trade-offs associated with meeting “ultimate” neuro-inspired architecture specifications will be studied.