|
|
PUBLICATIONS
Book chapters:
1. Oxidation and Gate Dielectrics
C. R. Cleavelin, L. Columbo, H. Niimi, S. Pas, and E. M. Vogel,
Book chapter in Handbook of Semiconductor Manufacturing Technology, 2nd edition,
ed. Y. Nishi and R. Doering
Taylor and Francis Group, 37 pages, 2007.
2. MOS Device Characterization
E. M. Vogel, and V. Misra,
Book chapter in Handbook of Silicon Semiconductor Metrology, ed. A. C. Diebold
Marcel-Dekker, 37 pages, 2001. Link
3. Oxidation
C. R. Cleavelin, S. Pas, E. M. Vogel, and J. J. Wortman,
Book chapter in Handbook of Semiconductor Manufacturing Technology,
ed. Y. Nishi and R. Doering,
CRC Press, 22 pages, 2000. Link
Journal Articles (*2 invited):
1. Extraction of the Effective Mobility of In0.53Ga0.47As MOSFETs
C. L. Hinkle, A. M. Sonnet, R. A. Chapman, and E. M. Vogel
Accepted IEEE Electron Device Letters
2. Half-cycle ALD reaction studies of Al2O3 on (NH4)S2 passivated GaAs(100) surfaces
M. Milojevic, C. L. Hinkle, F. S. Aguirre-Tostado, H. C. Kim, E. M. Vogel, J. Kim and R. M Wallace
Applied Physics Letters, 93, 252905 (2008). Link
3. Half-cycle atomic layer deposition reaction studies of Al2O3 on In0.2Ga0.8As (100) surfaces
M. Milojevic, F. S. Aguirre-Tostado, C. L. Hinkle, H. C. Kim, E. M. Vogel, J. Kim, and R. M. Wallace
Applied Physics Letters, 93, 202902 (2008). Link
4. S passivation of GaAs and band bending reduction upon atomic layer deposition of HfO2/Al2O3 nanolaminates
F. S. Aguirre-Tostado, M. Milojevic, K. J. Choi, H. C. Kim, C. L. Hinkle, E. M. Vogel, J. Kim, T. Yang, Y. Xuan, P. D. Ye, and R. M. Wallace
Applied Physics Letters, 93, 061907 (2008). Link
5. Smooth and uniform Al2O3 dielectric layer deposited by atomic layer deposition for graphene-based nanoelectrics
B. Lee, H.-C. Kim, M. Kim, R. M. Wallace, E. M. Vogel and J. Kim
Applied Physics Letters, 92, 203102 (2008). Link
6. Indium stability on InGaAs during atomic H surface cleaning
F. S. Aguirre-Tostado, M. Milojevic, C. L. Hinkle, E. M. Vogel, R. M. Wallace, S. McDonnell, and G. J. Hughes
Applied Physics Letters, 92, 171906 (2008). Link
7. Impact of Semiconductor/Contact Metal Thickness Ratio on Organic Thin Film Transistor Performance
S. Gowrisanker, Y. Ai, M. A. Quevedo-Lopez, H. Jia, H. N. Alshareef, E. Vogel, and B. Gnade
Applied Physics Letters, 92, 153305 (2008). Link
8. Performance enhancement of n-channel inversion type InxGa1-xAs metal-oxide-semiconductor field effect transistor using ex-situ deposited thin amorphous silicon layer
A. M. Sonnet, C. L. Hinkle, M. N. Jivani, R. A. Chapman, G. P. Pollack, R. M. Wallace, and E. M. Vogel
Applied Physics Letters, 93, 122109 (2008). Link
9. Comparison of n-type and p-type GaAs oxide growth and its effects on frequency dispersion characteristics
C. L. Hinkle, A. M. Sonnet, E. M. Vogel, M. Milojevic, F. S. Aguirre-Tostado, H. C. Kim, J. Kim, and R. M. Wallace
Applied Physics Letters, 93, 113506 (2008). Link
10. GaAs interfacial self-cleaning by atomic layer deposition
C. L. Hinkle, A. Sonnet, E. M. Vogel, S. McDonnell, G. Hughes, M. Milojevic, B. Lee , F. Aguirre-Tostado , K.-J. Choi, H. Kim , J. Kim, and R. M. Wallace
Applied Physics Letters, 92, 071901 (2008). Link
11. Internal Photoemission Spectroscopy of [TaN/TaSiN] and [TaN/TaCN] Metal Stacks On SiO2 and [HfO2 / SiO2] Dielectric Stack
N. V. Nguyen, H. D. Xiong, J. S. Suehle, O. Kirillov, E. M. Vogel, P. Majhi and H.-C. Wen
Applied Physics Letters, 92, 092907 (2008). Link
12. Frequency dispersion reduction and bond conversion on n-type GaAs by in-situ surface oxide removal and passivation
C. L. Hinkle, A. M. Sonnet, E. M. Vogel, S. McDonnell, M. Milojevic, B. Lee, F. S. Aguirre-Tostado, K. J. Choi, J. Kim, and R. M. Wallace
Applied Physics Letters, 91, 163512 (2007). Link
13. Spatial Distributions of Trapping Centers in HfO2/SiO2 Gate Stack
D. Heh, C. D. Young, G. A. Brown, P. Y. Hung, A. Diebold, E. M. Vogel, J. B. Bernstein, and G. Bersuker
IEEE Transactions on Electron Devices, 54, 1338-1345 (2007). Link
14. Precise alignment of single nanowires and fabrication of nanoelectromechanical switch and other test structures
Q. Li, S.-M. Koo, C. A. Richter, M. D. Edelstein, J. E. Bonevich, J. J. Kopanski, J. S. Suehle, and E. M. Vogel
IEEE Transactions on Nanotechnology, 6, 256-263 (2007). Link
15. Technology and metrology of new electronic materials and devices
E. M. Vogel
Nature Nanotechnology, 2, 25-32 (2007). *invited. Link
16. Three-dimensional simulation study of the improved on/off current ratio in silicon nanowire field-effect transistors
C. Y. Choi, W. J. Cho, S. M. Koo, S. Kim, Q. Li, J. S. Suehle, C. A. Richter, and E. M. Vogel,
Journal of the Korean Physical Society, 53, 1680-1684 (2007).
17. 14 MHz organic diodes fabricated using photolithographic processes
Y. Ai, S. Gowrisanker, H. Jia, I. Trachtenberg, E. Vogel, R. M. Wallace, B. E. Gnade, R. Barnett, H. Stiegler, and H. Edwards
Applied Physics Letters, 90, 262105 (2007). Link
18. Metrology Challenges for Emerging Research Devices and Materials
C. M. Garner, and E. M. Vogel
IEEE Transactions on Semiconductor Manufacturing, 19, 397-403 (2006). *invited Link
19. Spatial Distributions of Trapping Centers in HfO2/SiO2 Gate Stacks
D. Heh, E. M. Vogel, J. B. Bernstein, C. D. Young, G. A. Brown, P. Y. Hung, A. Diebold, and G. Bersuker
Applied Physics Letters, 88, 152907 (2006). Link
20. A Comparison of Thickness Values for Very Thin SiO2 Films by Using Ellipsometric, Capacitance-Voltage, and HRTEM Measurements
J. Ehrstein, C. Richter, D. Chandler-Horowitz, E. Vogel, C. Young, S. Shah, D. Maher, B. Foran, P. Y. Hung, and A. Diebold
Journal of the Electrochemical Society, 153, F12-F19 (2006). Link
21. Comparison of scanning capacitance microscopy and scanning Kelvin probe microscopy in determining two-dimensional doping profiles of Si homostructures
S.-E. Park, N. V. Nguyen, J. J. Kopanski, J. S. Suehle, and E. M. Vogel
Journal of Vacuum Science and Technology B, 24, 404-407 (2006). Link
22. Combinatorial Study of Ni-Ti-Pt Ternary Metal Gate Electrodes on HfO2 for the Advanced Gate Stack
K.-S. Chang, M. Green, J. Suehle, E. Vogel, H. Xiong, J. Hattrick-Simpers, I. Takeuchi, O. Famodu, K. Ohmori, P. Ahmet, T. Chikyow, P. Majhi, B.-H. Lee, and M. Gardner
Applied Physics Letters, 89, 142108 (2006). Link
Interface Characterization of Molecular-Monolayer/SiO2 Based Molecular Junctions,
C. A. Richter, C. A. Hacker, L. J. Richter, O. A. Kirillov, J. S. Suehle, and E. M. Vogel, Solid-State Electronics, 50, 1088-1096 (2006). Link
23. Enhanced Channel Modulation in Dual-Gated Silicon Nanowire Transistors
S.-M. Koo, Q. Li, M. D. Edelstein, C. A. Richter, and E. M. Vogel
NanoLetters, 5, 2519-2523 (2005). Link
24. Silicon nanowires as enhancement-mode Schottky-barrier field-effect transistors
S.-M. Koo, M. D. Edelstein, Q. Li, C. A. Richter, and E. M. Vogel
Nanotechnology, 16, 1482-1485 (2005). Link
25. Reverse Short Channel Effects in High-k gated nMOSFETs
J.-P. Han, S. M. Koo, E. M. Vogel, E. P. Gusev, C. D'Emic, C. A. Richter, and J. S. Suehle
Microelectronics Reliability, 45, 783-785 (2005). Link
26. Nanometre gaps in gold wires are formed by thermal migration
G. K. Ramachandran, M. D. Edelstein, D. L. Blackburn, J. S. Suehle, E. M. Vogel, and C. A. Richter
Nanotechnology, 16, 1294-1299 (2005). Link
27. High Inversion Current in Silicon Nanowire Field Effect Transistors
S.-M. Koo, A. Fujiwara, J.-P. Han, E. M. Vogel, C. A. Richter, and J. E. Bonevich
NanoLetters, 4, 2197-2201 (2004). Link
28. Influence of buffer layer thickness on memory effects of SrBi2Ta2O9/SiN/Si structures
J.-P. Han, S.-M. Koo, C. A. Richter, and E. M. Vogel
Applied Physics Letters, 85, 1439-1441 (2004). Link
29. Asymmetric Energy Distribution of Interface Traps in n- and p-MOSFETs with HfO2 Gate Dielectric on Ultrathin SiON Buffer Layer
J.-P. Han, E. M. Vogel, E. P. Gusev, C. D'Emic, C. A. Richter, D. W. Heh, and J. S. Suehle,
IEEE Electron Device Letters, 25, 126-128 (2004). Link
30. Crystalline Quality of Silicon-On-Insulator Characterized by Spectroscopic Ellipsometry and Raman Spectroscopy
N. V. Nguyen, J. E. Maslar, Jin-Yong Kim, Jin-Ping Han, Jin-Won Park, D. Chandler-Horowitz, and E. M. Vogel
Applied Physics Letters, 85, 2765-2767 (2004). Link
31. Molecular Devices Formed by Direct Monolayer Attachment to Silicon
C. A. Richter, C. Hacker, L. J. Richter, and E. M. Vogel
Solid-State Electronics, vol. 48, 1747-1752 (2004). Link
32. A capacitance-voltage model for polysilicon-gated MOS devices including substrate quantization effects based on modification of the total semiconductor charge
E. M. Vogel, C. A. Richter, and B. G. Rennex
Solid-State Electronics, 47, 1589-1596 (2003). Link
33. Impact of Substrate Hot Hole Injection on Ultra-thin Silicon Dioxide Breakdown
D. Heh, E. M. Vogel, and J. B. Bernstein
Applied Physics Letters, 82, 3242-3244 (2003). Link
34. Impact of the Trapping of Anode Hot Holes on Silicon Dioxide Breakdown
E. M. Vogel, D.-W. Heh, and J. B. Bernstein
IEEE Electron Device Letters, 23, 667-669 (2002). Link
35. Interaction between low energy electrons and defects created by hot holes in ultra-thin silicon dioxide
E. M. Vogel, D. Heh, and J. B. Bernstein
Applied Physics Letters, 80, 3343-3345 (2002). Link
36. Observation of Latent Reliability Degradation in Ultra-Thin Oxides After Heavy-Ion Irradiation
J. S. Suehle, E. M. Vogel, P. Roitman, J. F. Conley, Jr., A. H. Johnston, B. Wang, J. B. Bernstein, and C. E. Weintraub
Applied Physics Letters, 80, 1282-1284 (2002). Link
37. Application of Low Frequency Charge Pumping on Thin Stacked Dielectrics
C. E. Weintraub, E. M. Vogel, N. Yang, V. Misra, J. J. Wortman, J. J. Ganem, and P. Masson
IEEE Transactions on Electron Devices, 48, 2754-2762 (2001). Link
38. Time-Dependent Breakdown of Ultra-Thin SiO2 Gate Dielectrics Under Pulsed Biased Stress B.Wang, J. S. Suehle, E. M. Vogel, and J. B. Bernstein
IEEE Electron Device Letters, 22, 224-226 (2001). Link
39. A Comparison of Quantum-Mechanical Capacitance-Voltage Simulators
C. A. Richter, A. R. Hefner, and E. M. Vogel
IEEE Electron Device Letters, 22, 35-37 (2001). Link
40. Reliability of Ultra-thin Silicon Dioxide Under Substrate Hot-electron, Substrate Hot-hole, and Tunneling Stress
E. M. Vogel, M. D. Edelstein, and J. S. Suehle
Microelectronic Engineering, 59, 73-83 (2001). Link
41. Defect generation and breakdown of ultra-thin silicon dioxide induced by substrate hot-hole injection
E. M. Vogel, M. D. Edelstein, and J. S. Suehle
Journal of Applied Physics, 90, 2338-2346 (2001). Link
42. Heavy Ion Induced Soft Breakdown of Thin Gate Oxides
J. F. Conley, Jr., J. S. Suehle, A. H. Johnston, B. Wang, T. Miyahara, E. M. Vogel, and J. B. Bernstein
IEEE Transactions on Nuclear Science, 48, 1913-1916 (2001). Link
43. Reliability of Ultra-thin Silicon Dioxide Under Combined Substrate Hot Electron and Constant Voltage Tunneling Stress
E. M. Vogel, J. S. Suehle, M. D. Edelstein, B. Wang, Y. Chen, and J. B. Bernstein
IEEE Transactions on Electron Devices, 47, 1183-1191 (2000). Link
44. Limitations of Conductance to the Measurement of the Interface State Density of MOS Capacitors with Tunneling Gate Dielectrics
E. M. Vogel, W. K. Henson, C. A. Richter, and J. S. Suehle,
IEEE Transactions on Electron Devices, 47, 601-608 (2000). Link
45. Analysis of Leakage Currents and Power Consumption for CMOS Technology in the 100 nm Regime
W. K. Henson, N. Yang, S. Kubicek, E. M. Vogel, J. J. Wortman, K. De Meyer, and
A. Naem
IEEE Transactions on Electron Devices, 47, 1393-1400 (2000). Link
46. Modeling the Trends in Valence-Band Electron Tunneling in NMOSFETs with Ultrathin SiO2 and SiO2/Ta2O5 Dielectrics with Oxide Scaling
A. Shanware, H. Z. Massoud, E. Vogel, K. Henson, J. R. Hauser, and J. J. Wortman
Microelectronic Engineering, 48, 295-298 (1999). Link
47. Electrical Properties of Oxynitride Thin Films Using Noise and Charge Pumping Measurements
P. Masson, P. Morfouli, J. L. Autran, J. Brini, B. Balland, E. M. Vogel, and J. J. Wortman
Journal of Non-Crystalline Solids, 245, 54-58 (1999). Link
48. Estimating Oxide Thickness of Tunnel Oxides Down to 1.4 nm Using Conventional Capacitance-Voltage Measurements on MOS Capacitors
W. K. Henson, K. Z. Ahmed, E. M. Vogel, J. R. Hauser, J. J. Wortman, R. Dätta, M. Xu and D. Venables
IEEE Electron Device Letters, 20, 179-181 (1999). Link
49. Effects of Si Source Gases (SiH4 and Si2H6) on Polycrystalline-Si1-xGex Deposited on Oxide by RTCVD
V. Z-Q. Li, M. R. Mirabedini, E. Vogel, K. Henson, D. Batchelor, J. J. Wortman, and R. T. Kuehn
Electrochemical and Solid-State Letters, 1, 153-155 (1998). Link
50. Modeled tunnel currents for high dielectric constant dielectrics
E. M. Vogel, K. Z. Ahmed, B. Hornung, W. K. Henson, P. K. McLarty, G. Lucovsky, J. R. Hauser, and J. J. Wortman
IEEE Transactions on Electron Devices, 45, 1350-1355 (1998). Link
51. Electrical and reliability properties of thin silicon oxynitride dielectrics formed by low pressure rapid thermal chemical vapor deposition
P. Morfouli, G. Ghibaudo, E. M. Vogel, W. L. Hill, V. Misra, P. K. McLarty, and J. J. Wortman
Solid-State Electronics, 41, 1051-1055 (1997). Link
52. Low-frequency noise characterization of n- and p- MOSFET’s with ultrathin oxynitride gate films
P. Morfouli, G. Ghibaudo, T. Ouisse, E. Vogel, W. Hill, V. Misra, P. McLarty, and J. J. Wortman
IEEE Electron Device Letters, 17, 395-397 (1996). Link
53. Mobility behavior of n-channel and p-channel MOSFETs with oxynitride gate dielectrics formed by low-pressure rapid thermal chemical vapor deposition
E. M. Vogel, W. L. Hill, V. Misra, P. K. McLarty, J. J. Wortman, J. R. Hauser, P. Morfouli, G. Ghibaudo, and T. Ouisse
IEEE Transactions on Electron Devices, 43, 753-758 (1996). Link
54. Electrical properties of composite gate oxides formed by rapid thermal processing
V. Misra, W. K. Henson, E. M. Vogel, G. A. Hames, P. K. McLarty, J. R. Hauser, and J. J. Wortman
IEEE Transactions on Electron Devices, 43, 636-646 (1996). Link
55. Low-pressure rapid thermal chemical vapor deposition of oxynitride gate dielectrics for n-channel and p-channel MOSFETs
W. L. Hill, E. M. Vogel, V. Misra, P. K. McLarty, and J. J. Wortman,
IEEE Transactions on Electron Devices, 43, 15-22 (1996). Link
56. N-channel and p-channel MOSFETs with gate dielectrics formed using low pressure rapid thermal chemical vapor deposition
W. L. Hill, E. M. Vogel, P. K. McLarty, V. Misra, J. J. Wortman, and V. Watt
Microelectronic Engineering, 28, 269-272 (1995). Link
Conference Proceedings (*6 invited):
1. A gate dielectric last approach to integrate organic based devices on plastic substrates
S. Gowrisanker, Y. Ai, M. A. Quevedo-Lopez, H. Jia, E. Vogel, and B. Gnade,
Proceedings of the Academic Track of the 2008 Flexible Electronics and Displays - Conference and Exhibition, art. no. 4483882 (2008).
2. Characterization of Electrically Active Interfacial Defects in High-κ Gate Dielectrics
E. M. Vogel, A. M. Sonnet, and C. L. Hinkle,
ECS Transactions, 11, 393 (2007). *invited Link
3. Detection of Electron Trap Generation Due to Constant Voltage Stress on High-κ Gate Stacks
C. D. Young, S. Nadkarni, D. Heh, H. R. Harris, R. Choi, J. J. Peterson, J. H. Sim, S. A. Krishnan, J. Barnett, E. Vogel, B.H. Lee, P. Zeitzoff, G. A. Brown, and G. Bersuker
IEEE International Reliability Physics Symposium Proceedings, 169-173 (2006). Link
4. Work function characterization of TaSiN and TaCN electrodes using CV, IV, IPE and SKPM
H. D. Xiong, N. V. Nguyen, J. J. Kopanski, J. S. Suehle, and E. M. Vogel
ECS Transactions, 3, 25-36 (2006). Link
5. Characterization of electrically active defects in high-k gate dielectrics using charge pumping
E. M. Vogel and D. Heh
NATO Advanced Research Workshop on Defects in Advanced High-k Dielectric Nanoelectronic Semiconductor Devices, 85-96 (2005). *invited
6. Physical Mechanisms of Ultra-thin Silicon Dioxide Degradation and Breakdown
E. M. Vogel
Proceedings of the Electrochemical Society, 279-292 (2005). *invited Link
7. Metrology for Emerging Research Devices and Materials
E. M. Vogel
Characterization and Metrology for ULSI Technology, AIP Conference Proceedings, 788, 650-655 (2005). *invited Link
8. Detection of trap generation in high-kappa gate stacks
C. D. Young, S. Nadkarni, D. Heh, H. R. Harris, R. Choi, J. J. Peterson, J. H. Sim, S. A. Krishnan, J. Barnett, E. Vogel, B.H. Lee, P. Zeitzoff, G. A. Brown, and G. Bersuker
IEEE Integrated Reliability Workshop Final Report, 79-83 (2005). Link
9. The Contribution of HfO2 Bulk Oxide Traps to Dynamic NBTI in pMOSFETs
B. Zhu, J. S. Suehle, E. Vogel, and J. B. Bernstein
IEEE International Reliability Physics Symposium Proceedings, 533-537 (2005). Link
10. New Insights into Threshold Voltage Shifts for Ultrathin Gate Oxides
D. Heh, E. M. Vogel, and J. B. Bernstein
IEEE Integrated Reliability Workshop Final Report, 99-101 (2004). Link
11. Characterization of Structural Quality of Bonded Silicon-on-Insulator Wafers by Spectroscopic Ellipsometry and Raman Spectroscopy
N. V. Nguyen, J. E. Maslar, J.-Y. Kim, J.-P. Han, J.-W. Park, D. Chandler-Horowitz , and E. M. Vogel
MRS Symp. Proc., High-Mobility Group-IV Materials and Devices, 127-132 (2004).
12. Energy Distribution of Interface Traps in High-k Gated MOSFETs
J.-P. Han, E. M. Vogel, E. P. Gusev, C. D'Emic, C. A. Richter, D. Heh, and J. Suehle
Digest of Technical Papers - Symposium on VLSI Technology, 161-162 (2003). Link
13. Challenges of Electrical Measurements of Advanced Gate Dielectrics in Metal-Oxide-Semiconductor Devices
E. M. Vogel, and G. A. Brown
International Conference on Characterization and Metrology for ULSI Technology, AIP Conference Proceedings, 683, 771-781 (2003). *invited Link
14. Thickness evaluation for 2 nm SiO2 films, a comparison of ellipsometric, capacitance-voltage and HRTEM measurements
J. Ehrstein, C. Richter, D. Chandler-Horowitz, E. Vogel, D. Ricks, C. Young, S. Spencer, S. Shah, D. Maher, B. Foran, A. Diebold, and P. Y. Hung
International Conference on Characterization and Metrology for ULSI Technology, AIP Conference Proceedings, 683, 331-336 (2003). Link
15. Defect Generation in Ultra-thin Oxide Over Large Fluence Ranges
D. Heh, J. B. Bernstein, and E. M. Vogel,
IEEE Integrated Reliability Workshop Final Report (2002). Link
16. Latent Reliability Degradation of Ultra-Thin Oxides After Heavy Ion and γ –ray Irradiation
B. Wang, J. S. Suehle, J. F. Conley, Jr., E. M. Vogel, C. E. Weintraub, A. H. Johnston, and J. B. Bernstein
IEEE Integrated Reliability Workshop Final Report, 16-19 (2001). Link
17. The Effect of Stress Interruption and Pulsed Bias Stress on Ultra-thin Gate Dielectric Reliability
B. Wang, J. S. Suehle, E. M. Vogel, and J. B. Bernstein
IEEE International Integrated Reliability Workshop Final Report, 74-79 (2000). Link
18. Temperature Dependence of Soft Breakdown and Wear-Out in Sub 3 nm SiO2 Films
J. S. Suehle, E. M. Vogel, B. Wang, and J. B. Bernstein
IEEE International Reliability Physics Symposium Proceedings, 33-39 (2000). Link
19. Extraction of the Gate Oxide Thickness of N- and P-Channel MOSFETs Below 20 Å from the Substrate Current Resulting from Valence-Band Electron Tunneling
A. Shanware, J. P. Shiely, H. Z. Massoud, E. Vogel, K. Henson, A. Srivastava, C. Osburn, J. R. Hauser, and J. J. Wortman
Technical Digest - International Electron Device Meeting, 815-819 (1999). Link
20. Sheet and Line Resistance of Patterned SOI Surface Film CD Reference Materials as a Function of Substrate Bias
R. A. Allen, E. M. Vogel, L. W. Linholm, and M. W. Cresswell
IEEE International Conference on Microelectronic Test Structures, 51-55 (1999). Link
21. Evaluation of 2.0 nm Grown and Deposited Dielectrics in 0.1 mm PMOSFETs
A. Srivastava, H. H. Heinisch, E. Vogel, C. Parker, C. M. Osburn, N. A. Masnari, J. J. Wortman, and J. R. Hauser
Materials Research Society Symposium Proceedings, 525, 163-170 (1998).
22. Silicon oxynitride films formed by rapid thermal chemical vapor deposition for VLSI applications
E. M. Vogel, J. J. Wortman, P. K. McLarty, V. H. C. Watt, and B. Kirkpatrick
Proceedings of the Symposium on Silicon Nitride and Silicon Dioxide Thin Insulating Films, 97, 394-407 (1997). *invited |
