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Students Advised by Dinesh Bhatia

Doctoral Dissertations

  1. Devangsingh Sankhala, “Embedded Platform for non-Invasive Glucose Sensing”, Co-advised with Prof. Shalini Prasad

  2. Pingakshaya Goswami, “Machine Learning Based Rotability Prdiction for FPGAs”, Fall 2017.

  3. Masoud Shahshahani, “Generalized Approach for Reconfigurable CNNs”, Fall 2016-

  4. Sameer Arora, Ph.D., “Non-Linear Control Techniques for DC-DC Converters”, graduated, Fall 2017. Intersil. (Co-advised with Prof. Poras Balsara)

  5. Girish Deshpande, Ph.D., “Thermal Management Techniques in FPGAs”, graduated, Fall 2017, nVidia.

  6. William Preston Walker, “Automated Ingestion Detection to Supplement Obesity Management”, Graduated, Fall 2011, Mathworks.

  7. Antione Lourdes Praveen Aroul, “Robust Body Sensor Network for Connected Health”, Graduated, Spring 2012, Texas Instruments.

  8. Shilpa Bhoj, “Thermal Management Methodology for FPGAs”, graduated, Fall 2008, Qualcomm.

  9. Todd Polk, “Self-Powered Wireless Sensor Networks for Telemedicine Applications”, graduated Fall 2007. Texas Science Institute.

  10. Rajarshee Bhardwaj, “Architecture and Design Methodology for Power Gated Programmable Fabrics”, graduated Fall 2006, Texas Instruments.

  11. Shankar Balachandaran, “A-Priority Interconnect Estimation for Field Programmable Gate Arrays”, Graduated Summer 2005, Assistant Professor, Indian Institute of Technology at Madras, Chennai, India.

  12. Parivallal Kannan, “Interconnection Estimation and Routability Prediction for FPGAs”, Graduated December 2003, Employed with Xilinx.

  13. John Martin Emmert, “Algorithms for Physical Mapping of Circuits to Field Programmable Gate Arrays”, May 1999, Associate Professor, University of North Carolina at Charlotte.

  14. Gregory Tumbush, “Partitioning under Multiple Constraints”, Graduated March 1998, Air Force Research Laboratory, WPAFB, Ohio.

  15. Venkateswara Natesan, “A Framework for Estimation and Synthesis of VLSI Layouts”. Graduated November 1996, Employed with IBM at East Fishkill, NY.

Master's Thesis

  1. Abhishek G. Saxena, “Emotion and Face Recognition using Embedded Platform”, Summer 2018, Huawei.

  2. Muhammad Mohid Nabil, “FPGA Implementation of Reduced Precision Convolutional Neural Networks”, Summer 2018, Mathworks.

  3. Rohit Somwanshi, “CAD Flow for Hotspot Management in FPGAs”, Summer 2017, Cadence Design Systems.

  4. Dakota J. Koelling, “FPGA Based KNN Search Engine”, Fall 2016, Cypress Semiconductors.

  5. Athul Asokan Thulasi, “Portable, Configurable Impedance Measurement Device for Sweat based Glucose Measurement”, Fall 2016, Xilinx.

  6. Pingakshaya Goswami, “Floorplanning for Partially Reconfigurable Designs on Heterogeneous FPGAs”, Fall 2015, Xilinx and then PhD Program.

  7. Harishankar Janardhan, “Resource Management in Partially Reconfigurable FPGAs”, Fall 2014, Xilinx.

  8. Vishnoukumaar Sivaji, “Novel Technique in Sleep Apnea Monitoring”, Spring 2014, PhD Program in Bioengineering.

  9. Koushik Vaidyanathan, “Digital Signal Control of Feedback Linearized DC-DC Converters” Co-advised with Prof. Poras Balsara, Graduated, Fall 2011, Texas Instruments.

  10. Arun Gopalaswami, “Zigbee Based Residential Energy Management System”, Graduated, Summer 2011, Mathworks.

  11. Swarup Doshi, “Analysis of Feedback Linearized DC-DC Boost and Buck-Boost Converters” Graduated, Fall 2011, GE.

  12. Amit Shah, “Health and Activity Monitoring System”, November 2010, Qualcomm.

  13. Rangarajan Lakshminarasimhan Ravi, “A Discrete Wavelet Transform Based Low Complexity H.264 Encoder for High Bit Rate Applications”, August 2010.

  14. Kumarswamy Ramanathan, “Low-Power Filters for Portable Video Decoders”, Fall 2008, AMD.

  15. Arvind Rajasekaran, “Energy Harvesting and Management for Microsystems”, Started September 2007, Qualcomm.

  16. Jay P. Shah, “Arm and FPGA Implementations of Baseband Processing Unit for DRP Assisted Emergency Radion System”, graduated, Fall 2008, Qualcomm.

  17. Kumarswamy Ramanathan, “Low Power Filters for Portable Video Decoders”, graduated Fall 2008, AMD.

  18. Joel Votaw, “Asynchronous Microcontrollers for Ultra Low Power Sensor Architectures”, graduated Fall 2007. L3 Communications.

  19. Sanjay P. Singh, “Modeling and Analysis of Router Architectures and Network Interface Architecture for Network on Chip”, graduated October 2006. Texas Instruments.

  20. Tanvi Nagda, “Memory Architectures for NoC based Socs”, graduated Fall 2006, M.S. Emerging Memory Technologies.

  21. Jathan Rai, “Design of Power Aware Buckets for Programmable Architectures”, graduated Fall 2006, AMD.

  22. Narayan Subramanian, “Floorplanning for Power Aware FPGA Architectures”, graduated December 2005. Texas Instruments.

  23. Rashida Rajagara, “Routing Architectures for VPGAs”, graduated Spring 2005. Qualcomm.

  24. Rajan Konar, “Exploration of Power Aware Programmable Architectures”, graduated February 2005. Freescale Semiconductors.

  25. Mukesh Chugh, “Design and Implementation of Configurable W-CDMA Rake Receiver Architectures on FPGA”, graduated December 2004, Mathworks.

  26. Manjunath Gangadhar, “Hardware based Acceleration for JPEG 2000”, graduated December 2003. Intel Corporation

  27. Hem Neema, “Comparative Study of Algorithms implemented in Software and FPGA based Hardware”, Graduated February 2001. Xilinx Corporation.

  28. Chakrapani Gollamudi, “Evolutionary Design of Digital and Analog Circuits”, Graduated February 2001. Hewlett Packard.

  29. Vikas Sharma, “FPGA Floorplanning”, Graduated September 2001.

  30. Deepak Mekaraj, “A Flexible Framework for Optimized Temporal Partitioning”, January 2001, Intel Corporation.

  31. Pranav Rastogi, “Object oriented design methods for reconfigurable computing”, December 2000, Intel Corporation.

  32. Sandeep Lodha, “Partitioning for FPGA Based Architectures”, Graduated September 1999.  Synopsys Inc.

  33. Sunil Alexandar, “Graph Algorithms on Reconfigurable Architectures”, October 1999, CADENCE.

  34. Mandeep Singh, “A Framework for Testing and Validation of Adaptive Computing Systems”, expected completion May 1999, SUN Microsystems.

  35. Karthik Gajjalapurna, “Temporal Partitioning and Scheduling for Reconfigurable Computers”, September 1998, Synopsys Inc. Best Thesis Award, 1998-99.

  36. Kuldeep Simha, “NEBULA: A Partially and Dynamically Reconfigurable Architecture”, September 1998, Hewlett Packard.

  37. Arun Hegde, “C to Synthesizable VHDL”, January 1998, Digital Equipment Corporation (DEC).

  38. Akash Randhar, “Macro Block Based FPGA Floorplanning”, December 1997, Texas Instruments.

  39. Raghu Burra, “Timing Driven Partitioning for Board Level Architectures”, October 1997, Lucent Technologies.

  40. Doug Smith, “Reconfigurable and Adaptive Computing Environment”, June 1997, SUN Microsystems.

  41. Vijayanand Sankar, “Board Level Partitioning for Programmable Architectures”, Graduated, October 1996, Intel Corporation

  42. Jianzhong Shi, “FPGA Floorplanning”, September 1996, Lucent Technologies.

  43. Rajasekhar Medicherla, “Routing in Multi-Segmented FPGA Architectures”, Graduated May 1996, employed with VIEWlogic Systems Inc.

  44. Ramesh Rajagopalan, “Delay Optimization for Multi-FPGA Partitioning”, Graduated December 1994, employed with SUN Microsystems Computer Corporation.  

  45. Akila Subramaniam, “Timing Driven FPGA Placement”, Graduated, September 1994, employed with Synopsys Inc.

  46. Giriraj Devaraj, “Placement and Routing for Multi-chip Modules”, Graduated March 1994. Employed with Mentor Graphics Corporation. Commendable Thesis Award 1994-95.

  47. Vanitha Narasimhan, “Replication Based Partitioning for FPGAs”, Graduated March 1994, employed with VIEWlogic Systems Inc.

  48. Venkatraman Shankar, “Routing in Row Based Field-Programmable Gate Arrays”, Graduated Dec. 1993, employed with Intel Corporation.

  49. Amit Chowdhary, “Routability Analysis and Routing in Logic Cell Arrays”, Graduated August 1993, Best Thesis Award 1993-94.

Undergraduate Thesis/Senior Projects

  1. Amman Islam, Stuart Malone, Sainath Muntha, Thomas Jarvinen, “Generic Reconfigurable Convolution Engine”, Senior Design Project, Fall 2016-Spring 2017.

  2. Angel Amatya, Sacha Wimukdakom, Narottam Jha, Richard Moore, “Comets Shoe Navigational Aid: An easier way to travel”, Senior Design Project, Summer-Fall 2015.

  3. James Sisung, Jaison Abraham, Munazza Ali, Susy Martins, “Shoe Energy Harvest” Senior Design Project, Summer-Fall 2015.

  4. Uday Gurnani, “Wireless Body Temperature Monitoring”, Fall 2006.

  5. Aidan Skoyles, “Hardware Based Data Encryption” Senior project and honor’s thesis. McDermott Scholar at UTD.

  6. Deborah Edwards, “Speech Recognition Hardware” 2003.

  7. John Miller, “Reconfigurable Computing Systems”, 2001-2002.

  8. Lydia Porzucek, “Image Processing”, 2000-2001.

  9. Brad Beckman, Kevin Lake, Joe Potkay,”Hardware Implementation of Adobe Photoshop Filters”, 1999-2000.

  10. Paul Campisi, “A GUI Based FPGA Floorplanner”, 1995-96.

  11. Patrick Allen, “CAD Tool for Generating Layouts of Field-Programmable Interconnection Chips”, 1995-96.

  12. Todd Broch and Kevin Broch, “Hardware for Configurable Computing”, 1994-95.

  13. Eric Jubin and George Moussa, “Design of Application for Configurable Computer”, 1994-95.

  14. Peter Hodakievic, “Repairing Ultra Large Random Access Memory”, 1993-94.

  15. Robert Cheek, “Cost Driven Heterogenous K-way Partitioning”, 1993-94.

  16. Heather Howard, “SNOOPY: Monitor for PCI Bus”, 1993-94.

  17. Jeff Walrath and Chris Kiszely, “Maze Routing Chip”, 1992-93.

  18. Jeffery Scott and Thomas Green, “ECE: Elegant Compression Engine”, 1992-93.

  19. Mark Stevens, “General Purpose Prototyping Board”, 1992-93.

  20. Basem Nayfeh and David Berman, “Image Compression Architecture for Animated Video”, 1991-92.

  21. James Carter, “Electronic Billboard Graphics Engine Integrated Circuitry”, 1991-92.

  22. Tom Martin and Dean Arriens, “Hand-held Master Mind Game”, 1991-92.

  23. Kevin Rolfes, “Music Synthesis under MIDI Control”, 1991-92.

  24. Dave Lauerhauss and Eric Jones, “Hand-held Dungeons and Dragons Game”, 1991-92.

 

Erik Jonsson School of Engineering and Computer Science
University of Texas at Dallas