SSD CHARACTERIZATIONS:

Storage applications leveraging SSD technology are being widely deployed in diverse computing systems. These applications accelerate system performance by exploiting several SSD-specific characteristics. However, modern SSDs have undergone a dramatic technology and architecture shift in the past few years, which makes widely held assumptions and expectations regarding them highly questionable. The main goal of this project is to question popular assumptions and expectations regarding SSDs through an extensive experimental analysis. This project use two different types of SSD, which are most popular in many market segments; 1) PCI Express based SSDs and 2) mass storage type SSDs. This project also offers insightful analyses to system-level kernel and architecture designers.

PUBLICATIONS:

  • "Exploring Design Challenges in Getting Solid State Drives Closer to CPU," IEEE Transactions on Computers 2015
  • "Power, Energy and Thermal Considerations in SSD-Based I/O Acceleration," USENIX HotStorage'14
  • "Revisiting Widely-held Expectations of SSD and Rethinking Implications for Systems," SIGMETRICS'13
  • "An Evaluation of Different Page Allocation Strategies on High-Speed SSDs", USENIX HotStorage'12

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GREEN HIGH PERFORMANCE COMPUTING:

Drawing parallels to the rise of general purpose graphical processing units (GPGPUs) as accelerators for specific high performance computing (HPC) workloads, there is a rise in the use of non-volatile memory (NVM) as accelerators for I/O-intensive scientific applications. In addition, flash drives or NVM technologies begin to replace disks at major data centers of Amazon, Facebook, Dropbx and etc. In this work, we 1) deliver how to efficiently manage flash drives and emerging NVM technologies as an I/O accelerator in HPC and Data-center systems 2) redesign current memory/storage hierarchy and HPC storage stack from scratch with emerging NVM 3) develop a novel and efficient hardware/software cooperative techniques being aware of system-level characteristics as well as underlying NVM technologies complexities.

PUBLICATIONS:

  • "Triple-A: A Non-SSD Based Autonomic All-Flash Array for Scalable High Performance Computing Storage Systems," ASPLOS'14
  • "GPUdrive: Reconsidering Storage Accesses for GPU Acceleration," ASBD at ISCA'14
  • "Exploring the Future of Out-Of-Core Computing with Compute-Local Non-Volatile Memory," Supercomputing'13

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NVM CONTROLLER/SOFTWARE DESIGN:

Modern SSDs can be plagued by enormous performance variations depending on whether the underlying architectural complexities and NVM management overheads can be hidden or not. Designing a smart NVM controller is key hiding these architectural complexities and reducing the internal firmware overheads. In this project, we present a set of novel storage optimizations including various concurrency methods, I/O scheduling algorithms, and garbage collection avoidance mechanisms.

PUBLICATIONS:

  • "HIOS: A Host Interface I/O Scheduler for Solid State Disks," ISCA'14
  • "Sprinkler: Maximizing Resource Utilization in Many-Chip Solid State Disks," HPCA'14
  • "Physically Addressed Queueing (PAQ): Improving Parallelism in Solid State Disks," ISCA'12
  • "Taking Garbage Collection Overheads off the Critical Path in SSDs," USENIX Middleware'12
  • "Middleware - Firmware Cooperation for High-Speed Solid State Drives," USENIX Middleware'12

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PARALLEL I/O PROCESSING:

Exploiting internal parallelism over hundreds NAND flash memory is becoming a key design issue in high-speed SSDs. Main goal behind this memory-level parallelism project is to fully take advantage of both system-level and memory-level parallelism such that SSD can offer short latency with full bandwidth. In this project, we are exploring internal SSD/NVM architecture with a full design space sitting on system and memory-level organizations with a variety of parameters such as a standard queue, multiple buses, chips, and diverse advance flash operations.

PUBLICATIONS:

  • "Triple-A: A Non-SSD Based Autonomic All-Flash Array for Scalable High Performance Computing Storage Systems," ASPLOS'14
  • "HIOS: A Host Interface I/O Scheduler for Solid State Disks," ISCA'14
  • "Sprinkler: Maximizing Resource Utilization in Many-Chip Solid State Disks," HPCA'14
  • "Physically Addressed Queueing (PAQ): Improving Parallelism in Solid State Disks," ISCA'12
  • "An Evaluation of Different Page Allocation Strategies on High-Speed SSDs", USENIX HotStorage'12

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MEMORY SIMULATION MODELING, HW/SW CO-DESIGN:

To explore impacts of diverse NVM technologies in modern computer architecture and systems, it is required to have fast, high fidelitous and accurate NVM simulation/emulation research tools. Unfortunately, modeling NVM technologies for the broad range of variety is non-trivial research area as there are multiple design parameters and unprecedented device-level considerations. In this project, we are developing several research frameworks, including open-source simulation models, FPGA-based NVM emulators, and hardware validation prototypes. In addition to offering valuable research vehicles, we also propose a hardware-software codesign environment that will allow application, algorithm and system developers to influence the direction of future architectures, thereby satisfying diverse computing area demands.

PUBLICATIONS:

  • "NANDFlashSim: High-Fidelity, Micro-Architecture-Aware NAND Flash Memory Simulation," ACM Transaction on Storage 2015
  • "An Evaluation of Different Page Allocation Strategies on High-Speed SSDs," USENIX HotStorage'12
  • "Intrinsic Latency Variation Aware NAND Flash Memory System Modeling and Simulation at Microarchitecture level," MSST'12

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NEXT GENERATION NON-VOLATILE MEMORY:

We are researching next generation non-volatile memory (NVM) systems as a memory extension or NAND flash alternative storage medium. Especially, this project includes 1) characterizing challenges of emerging NVMs such as Resistive RAM (RRAM), Magnetic RAM (STT-RAM), Phase-change RAM (PCRAM), 2) building system-level prototypes, 3) exploring killer applications exploiting these emerging NVMs, 4) architecting new platforms with byte-addressable NVMs.

Emerging non-volatile memory system evaluation hardware platform, which can capture emerging NVM behaviors by examining real PCM and MRAM products including multiple types of flash memories (e.g., SLC, MLC, TLC). MSIS enables us to perform low-level studies such as device-level latency analysis, endurance test, energy consumption evaluation, data consistency test, and power power-off recovery evaluation.

PUBLICATIONS:

  • "Area, Power, and Latency Considerations of STT-MRAM to Substitute for Main Memory," MemoryForum at ISCA'14
  • "ZombieNAND:Resurrecting Dead NAND Flash for Improved SSD Longevity,", MASCOTS'14
  • "Design of a Large-Scale Storage-Class RRAM System," ICS'13
  • "Challenges in Getting Flash Drives Closer to CPU," USENIX HotStorage'13

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PROJECTS FOR JUST FUN:

A forerunner of high-end portable media player, which supports processing and managing images, and playing entertainment contents such as music, flash and digital movies as a standalone device. IPAD suggests the potential hand-held smart devices such as Apple's iPad, but our IPAD is developed four years earlier than the iPad first generation. Our IPAD provides a method to directly upload images, processed in X25 embedded platform to the web blog through wireless networks, which leads that users do not require to connect their own device to PC or laptop at all.

An intuitive drag and drop programming tool, which enables someone who doesn’t know how to program robotics invention to easily develop their own robots. Most people can create a program through an intuitive drag and drop programming. Code-wizard project provides programmable robot suites and a convenient mechanism to control them. Such robot suites consist of several peripheral devices such as interactive servo motors, and touch sensors.

An object oriented paradigm-based education game framework, where the goal is to develop a humanoid to battle against other humanoids, developed under Class-mate library. Developers who are not familiar with OOP can improve their programming skills and easily learn features of OOP such as the polymorphism, inheritance design as a part of game play. The purpose of class-mate project is very similar to java Robocode project. However, unlike java, C++ RTL have no VM, which allows to link diverse user's programmed objects. Class-mate leverages COM-based dynamic linkable object methods and provides a framework for playing/coding robots.

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