VLSI CAD Tools and Technology Files


  CAD tools Setup at UTD: In order to use CAD tools from Cadence, HSpice, and NanoSim you need to make
      sure that all Unix environment variables are correctly. You may do this by following the instructions for     
      VLSI CAD Software Setup
    


 

Schematic, Layout and Simulation Flow

  Schematic and Layout using Cadence Tools

For Cadence tools, we will use the 0.13μm CMOS technology available at UTD. The following are the steps that we will follow in our design:

     All the Cadence related tutorials listed above were developed by Akshay Sridharan and can also be accessed from this page: http://www.utdallas.edu/~akshay.sridharan/

     Step-by-Step Cadence tools guide from UT Austin

  Simulation using Nanosim and HSPICE

          Detailed user guides and other documentation for these simulators can be found in the next section.



Simulation Tools

  Simulation Tools: NanoSim

  Simulation Tools: HSpice


NCSU Flow with the 0.18um CMOS Technology

  • For other Cadence tutorials from NCSU, you can use theNCSU Cadence Design Kit (CDK)  (available from North Carolina State Univ.).  These tutorials are for 0.18μm CMOS  technology.  In order to run these tutorials, create a new Cadence working directory (in your home directory) and copy the following files:

    /home/cad/vlsi/NCSU-CDK/local/.cdsenv
    /home/cad/vlsi/NCSU-CDK/local/.cdsinit
    /home/cad/vlsi/NCSU-CDK/local/.simrc 
    /home/cad/vlsi/NCSU-CDK/local/cds.lib
    Before you do this make sure that your environment variables are
    set correctly as mentioned in the CAD tools setup above.

  • Invoke Cadence tools in your working directory by typing  icfb   at the command prompt.  You should now get the Cadence CIW (popup window) on your screen.
  • Cadence Tutorials from WPI:  http://www.vlsi.wpi.edu/cds/
  • NCSU Cadence Tutorials:  http://www.eda.ncsu.edu/wiki/Tutorial:Contents
  • Use the following tutorial to understand the Cadence design flow:  http://vlsi.wpi.edu/cds
  • Cadence tutorials from Virginia Tech:  http://www.vtvt.ece.vt.edu/vlsidesign/tutorial/Cadence_digi_intro.php
  • Generating SPICE3 netlist from Cadence
  • Note:  The netlist file generated does not have proper device names.  You can either edit netlist file manually and change all TSMC20P to pfet and TSMC20N to nfet or you can add these two statements at the top of the netlist file:
      .MSELECT tsmc20P pfet
      .MSELECT tsmc20N nfet

  MOSIS Fabrication Services

  CMOS Technology Information