Invited Talks

Please contact me if you are interested in a copy of the presentation files.

"An Overview of Hardware Security Research at UT Dallas’ Trusted and RELiable Architectures (TRELA) Laboratory,"
Invited Seminar at Air Force Research Laboratory (AFRL), Dayton, OH, Dec ’17 (Host: L. Orlando)

"Applications of Machine Learning in Hardware Security,"
Departmental Seminar, University of California, Berkeley, Berkeley, CA, Dec ’17 (Host: J. Roychowdhury)

"Enhanced Lithographic Hotspot Detection Through Design of Experiments,"
Special Session on Machine Learning in Testing Applications, IEEE International Test Conference, Fort Worth, TX, Oct ’17 (Host: P. Song)

"Machine Learning Applications in Semiconductor Design, Test & Yield Learning,"
GlobalFoundries, Malta, NY, Aug ’17 (Host: R. Desineni)

"Between a Rock and a Hard Place: Realities of Developing Formal Hardware Security and Trust Solutions,"
Keynote Address, IEEE International Verification and Security Workshop (IVSW), Thessaloniki, Greece, Jul ’17 (Host: M. Abadir)

"Toward Silicon-Based Cognitive Neuromorphic ICs,"
Invited Tutorial, IEEE International Mixed-Signal Test Workshop (IMSTW), Thessaloniki, Greece, Jul ’17 (Host: M. Barragan)

"Security and Trust in the Analog/Mixed-Signal/RF Domain: A Survey and a Perspective,"
Tutorial, IEEE International Symposium on Hardware Oriented Security and Trust (HOST), McLean, VA, May ’17 (Host: D. Forte)
Embedded Tutorial, IEEE European Test Symposium (ETS), Limassol, Cyprus, May ’17 (Host: G. Di Natale)

"Proof-Carrying Hardware Intellectual property (PCHIP),"
DARPA IP Theft Workshop, Arlington, VA, Feb ’16 (Host: K. Bernstein)

"Hardware-Induced Security and Privacy Vulnerabilities in IoT,"
Invited Talk at AT&T Foundry, Richardson, TX, Nov ’15 (Host: C. Lee)

"Hardware Trojans in Wireless Cryptgraphic ICs,"
Invited Talk at Foundations of Analog Circuits (FAC) Workshop, Austin, TX, Nov ’15 (Host: X. Li)
Invited Talk at IEEE Computer Society Chapter, Raleigh, NC, Oct ’15 (Host: C. Wang)

"From Data to Actions: Applications of Data Analytics in Semiconductor Manufacturing and Test,"
Tutorial, IEEE International Test Conference (ITC), Fortworth, TX, Oct ’17 (Host: P. Bernardi)
Tutorial, IEEE Design Automation and Test in Europe (DATE) Conference, Lausanne, Switzerland, Mar ’17 (Host: F. Fummi)
Tutorial, IEEE International Test Conference (ITC), Fortworth, TX, Nov ’16 (Host: P. Bernardi)
Tutorial, IEEE International Test Conference (ITC), Anaheim, CA, Oct ’15 (Host: P. Bernardi)
Tutorial, IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, May ’15 (Host: J. De La Rosa)
Tutorial, IEEE Design Automation and Test in Europe (DATE) Conference, Grenoble, France, Mar ’15 (Host: F. Fummi)

"Applications of Machine Learning in the Design of Trusted and Reliable Analog/RF ICs,"
Test Spring School, Nicosia, Cyprus, May ’17 (Host: H.-J. Wunderlich)
Departmental Colloquium, University of Washington, Seattle, WA Dec ’15 (Host: M. Soma)
Aristotle University of Thessaloniki, Thessaloniki, Greece, Mar ’15 (Host: A. Hatzopoulos)

"Towards Automatic Proof Generation for Information Flow Policies in Third-Party Hardware Intellectual Property,"
ARO Workshop on Trustworthy Hardware, New York, NY, Nov ’14 (Host: M. Maniatakos)

"Hardware Security: Building Trustworthy Systems,"
Pavilion Panel at Design Automation Conference, San Francisco, CA, Jun ’14 (Host: B. Cline)

"Hardware Trojans in Wireless Cryptographic ICs: How Can Test Help?,"
Invited Talk at Southwest Design for Test Conference, Austin, TX, May ’14 (Host: J. Johnson)

"Laser Trimming Speedup Through GP Modeling,"
Texas Instruments, Freising, Germany, Mar ’14 (Host: H. Blank)

"From Data to Actions: Challenges in Developing & Deploying Statistical Methods in Semiconductor Manufacturing & Test,"
Texas Instruments Data Analytics Workshop, Plano, TX, Mar ’14 (Host: J. Roehr)

Too High Frequency to Test - What is the Quality Impact?
Panelist, IEEE Test and Validation of High-Speed Analog Circuits Workshop, Anaheim, CA, Sep '13 (Host: S. Sunter)

Parametric Counterfeit IC Detection via Support Vector Machines
NYU-Abu Dhabi "Do you Trust Your Chip?" Workshop, New York, NY, Apr '13 (Host: M. Maniatakos)

Spatial Wafer-Level Correlation Modeling for Test Cost Reduction in Analog/RF Circuits
Freescale Semiconductor, Austin, TX, April '13 (Host: R. Raina)
Intel Corp, Santa Clara, CA, March '13 (Host: S. Natarajan)
Invited Talk, IEEE Workshop on Defect and Adaptive Test Analysis, Anaheim, CA, Nov '12 (Host: A. Sinha)
TxACE Weekly Meeting, University of Texas at Dallas, Richardson, TX, Nov '12 (Host: K. O)

Hardware Security and Trust
Tutorial, IEEE International Test Conference (ITC) , Seattle, WA, Sep '14 (Host: P. Bernardi)
Tutorial, IEEE Design Automation and Test in Europe (DATE) Conference, Grenoble, France, Mar '13 (Host: F. Fummi)
Texas Security Awareness Week (TexSAW), Richardson, TX, Oct '12 (Host: J. Shapiro)
Tutorial, IEEE International Conference on Computer Design (ICCD), Montreal, Canada, Sep '12 (Host: S. Tahar)

A Model-View-Controller (MVC) Framework for Adaptive Test
TxACE E-Seminar, University of Texas at Dallas, Richardson, TX, Nov '11 (Host: K. O)

On-Chip Neural Classifiers for Post-Deployment Trust Monitoring in Wireless Cryptographic ICs
Elevator Talks at the International Test Conference, Anaheim, CA, Sep '11 (Host: S. Mitra)

Post-Production Performance Calibration in Analog/RF ICs
TxACE Weekly Meeting, University of Texas at Dallas, Richardson, TX, Sep '11 (Host: K. O)

Post-Deployment Trust Monitoring in Wireless Cryptographic ICs
NYU-Abu Dhabi "Do you Trust Your Chip?" Workshop, New York, NY, Apr '11 (Host: O. Sinanoglu)

Proof-Carrying Hardware Intellectual Property: A Pathway to Trusted Module Acquisition
ARO Workshop on Trusted Hardware, Arlington, VA, Apr '11 (Hosts: C. Wang & M. Tehranipoor)

Trusted Integrated Circuits: Challenges & Opportunities Ahead
University of Belgrade, Belgrade, Serbia, Mar '13 (Host: I. Tartalja)
Technical University of Crete, Chania, Greece, Mar '13 (Host: A. Dollas)
National Technical University of Athens, Athens, Greece, Mar '13 (Host: Y. Papananos)
University of Athens, Athens, Greece, Mar '13 (Host: D. Gizopoulos)
University of Texas, Dallas, TX, Mar '11 (Host: N. Al-Dhahir)

A Machine Learning Approach to Robust Analog/RF Integrated Circuits
Brown University, Providence, RI, Mar '11 (Host: I. Bahar)
University of New Mexico, Albuquerque, NM, Mar '11 (Host: P. Zarkesh-Ha)

Low-Cost Testing for mmWave Test Devices: A Case Study
Invited Address at the 2nd International Workshop on Testing and Validation of High-Speed Analog Circuits, Austin, TX, Nov'10 (Host: S. Tabatabaei)

Adaptive Analog Test: Feasibility and Opportunities Ahead
Panel at IEEE VLSI Test Symposium, Santa Cruz, CA, Apr '10 (Host: P. Nigh)

Hardware Trojans and Trust in ICs
Hot Topic Session on Hardware Security at IEEE VLSI Test Symposium, Santa Cruz, CA, Apr '10 (Host: S. Bhunia)

Correlation Mining and its Applications in Reliable and Trusted Analog/RF ICs
University of Pittsburgh, Pittsburgh, PA, Apr '10 (Host: S. Levitan)

Hardware Trojans in Wireless Cryptographic Integrated Circuits
Microsoft Research, Bellevue , WA, Sep '10 (Host: D. Lymberopoulos)
Applied Physics Laboratory at Johns Hopkins University (JHU/APL), Laurel, MD, Jan '10 (Host: D. Wilt)
Elevator Talks at the International Test Conference, Austin, TX, Nov '09 (Host: S. Mitra)

A Machine-Learning Approach to Analog/RF Circuit Testing
Duke University, Durham, NC, Dec '09 (Host: K. Chakrabarty)
University of Connecticut, Storrs, CT, Nov '09 (Host: M. Tehranipoor)
Johns Hopkins University, Baltimore, MD, Oct '09 (Host: A. Terzis)

Workload-Cognizant Impact Analysis and Applications in Error Detection and Tolerance in Modern Microprocessors
Invited Talk at the International Conference on Defect and Fault Tolerance in VLSI Systems, Chicago, IL, Oct '09 (Host: S. Tragoudas)

Correlation Mining and its Applications in Test Cost Reduction, Yield Enhancement and Performance Calibration in Analog/RF Circuits
IBM T.J. Watson Research Center, Yorktown Heights, NY, Aug '09 (Host: P. Kudva)

Challenges in Schools with Smaller EDA Programs
Invited Talk at the Young Faculty Workshop on How to Survive and Succeed in Academia, held as part of the Design Automation Conference (DAC), San Francisco, CA, Jul '09 (Host: S. Levitan)

Hardware Trojan Horses: Fact or Fiction?
Pitney-Bowes, Stamford, CT, Jun '08 (Host: B. Haas)

A Non-Linear Neural Classifier and its Applications in Testing Analog/RF Circuits
Technical University of Chania, Crete, Greece, Jul '08 (Host: A. Dollas)
Jet Propulsion Lab, Pasadena, CA, Jun '08 (Host: A. Stoica)
University of Massachusetts, Amherst Amherst, MA, May '08 (Host: S. Kundu)
Cornell University, Ithaca, NY, April '08 (Host: R. Manohar)
University of Michigan, Ann Arbor, MI, Mar '08 (Host: J. Hayes)
Purdue University, West Lafayette, IN, Mar '08 (Host: K. Roy)
University of Iowa, Iowa City, IA, Mar '08 (Host: S. Reddy)
Princeton University, Princeton, NJ, Feb '08 (Host: N. Jha)
McGill University, Montreal, Canada, Feb '08 (Host: Z. Zilic)
Stanford University, Palo Alto, CA, Feb '08 (Host: S. Mitra)
Auburn University, Auburn, AL, Feb '08 (Host: A. Singh)
Georgia Institute of Technology, Atlanta, GA, Jan '08 (Host: A. Chatterjee)
University of Texas, Austin, TX, Jan '08 (Host: D. Pan)
University of Southern California, Los Angeles, CA, Nov. '07 (Host: S. Gupta)
University of California, Santa Barbara, CA, Nov '07 (Host: L. Wang)
University of Massachusetts, Lowell, Lowell, MA, May '07 (Host: M. Margala)
Freescale Semiconductor, Tempe, AZ, Oct '06 (Host: L. Luce)
IBM, Burlington, VT, Apr '06 (Host: M. Slamani)
TIMA Laboratory, Grenoble, France, Mar '06 (Host: S. Mir)
Carnegie Melon University, Pittsburgh, PA, Feb '06 (Host: S. Blanton)
University of Patras, Greece, Dec '05 (Host: D. Nikolos)
Intel Corp., Hillsboro, OR, Dec '05 (Host: A. Meixner)
Cypress Semiconductor, Lynwood, WA, Nov '05 (Host: K. Blakkan)
National Semiconductor, San Jose, CA, Apr '05 (Host: H. Haggag)

Novel Reconfigurable Computing Architectures Based on Non-Volatile Nanoelectronic Devices
Nanotechnology Research Initiative (NRI) Annual Review, Santa Clara, CA, Nov '07 (Host: J. Wesler)

Statistical Analysis of Parametric Measurements and its Applications in Analog/RF Test
Die Products Consortium (DPC), Santa Clara, CA, Oct '07 (Host: L. Gilg)

Novel Reconfigurable Computing Architectures Based on Non-Volatile Ferroelectric FETs
CRISP Review, New Haven, CT, Sep '07 (Host: J. Tully)

Concurrent Error Detection in Microprocessor Controllers
Intel Corporation, Santa Clara, CA, May '07 (Host: A. Jas)

A Machine Learning Approach to the Design of Trusted Integrated Circuits
BOEING Corp., Seattle, WA, Mar '07 (Host: R. Brees)

Testing Asynchronous Circuits: Challenges and Solutions
Nanochronous Inc., Heraklion, Crete, Greece, Jul '08 (Host: C. Sotiriou)
SUN Microsystems, Menlo Park, CA, May '06 (Host: J. Ebergen)

A Global Optimization Framework for Soft-Error Rate Reduction in Logic Circuits
BOEING Corp., Seattle, WA, Apr '06 (Host: R. Brees)

Implicit Functional Testing in Analog Circuits
University of Washington, Seattle, WA, Nov '05 (Host: S. Singh)
University of California, Los Angeles, Los Angeles, CA, May '05 (Host: M. Ercegovac)

Testing Ultra-High-Speed Asynchronous Circuits
BOEING Corp., Seattle, WA, May '05 (Host: W. Snapp)

Testing Speed-Independent Circuits
Boston University, Boston, MA, Dec '04 (Host: A. Taubin)

Concurrent Error Detection in Analog Circuits
University of Washington, Seattle, WA, Jan '04 (Host: M. Soma)
University of Rochester, NY, Dec '03 (Host: M. Margala)
Athens Institute of Technology, Greece, Nov '03 (Host: A. Dimitriou)

Concurrent Error Detection in FSMs
Brown University, Providence, RI, Dec '04 (Host: I. Bahar)
Columbia University, New York, NY, Nov '04 (Host: S. Nowick)
University of Washington, Seattle, WA, Jan '04 (Host: M. Soma)
Rensselaer Polytechnic Institute, Troy, NY, Dec '03 (Host: P. Drineas)
Athens University of Economics and Business, Athens, Greece, Jul '03 (Host: G. Polyzos)
University of California, San Diego, san Diego, CA, May '03 (Host: A. Orailoglu)
Yale University, New Haven, CT, Dec '02 (Host: K. Narendra)

Towards Cost-Effective Hierarchical Test Generation: What is Missing?
Symbol Technologies Distinguished Lecture Series, Polytechnic University, Brooklyn, NY, Mar '01 (Host: R. Karri)

Transparency-Based Testability Analysis for Hierarchical RTL Designs
Yale University, New Haven, CT, Apr '00 (Host: D. Henry)
University of Illinois, Urbana-Champaign, Urbana, IL, Apr '00 (Host: J. Patel)
University of Pittsburgh, Pittsburgh, PA, Mar '00 (Host: S. Levitan)
Polytechnic University, Brooklyn, NY, Mar '00 (Host: R. Karri)
Northeastern University, Boston, MA, Mar '00 (Host: F. Lombardi)
University of California, Irvine, Irvine, CA, Feb '00 (Host: F. Kurdahi)

TRANSPARENT: Translation Path Analysis Rendering Test
Intel Corp., Folsom, CA, Aug '99 (Host: P. Vishakantaiah)

ARTEMIS: Analysis of RTL Testability of Microprocessors
Intel Corp., Hillsboro, OR, Dec '97 (Host: S. Davidson)