| Dates |
Laboratory Assignment |
|
09/07, 09/09 |
Introduction
(student version) (lab. version) |
|
|
|
09/14, 09/16 |
Laboratory 1: |
|
Combinational logic design using FPGAs / CPLDs |
|
09/21, 09/23 |
Lab. 1 (continued) |
|
|
|
09/28, 09/30 |
Laboratory 2: |
|
Hierarchical
combinational logic design using MSI Macros |
|
10/05, 10/07 |
Lab. 2 (continued) |
|
|
|
10/12, 10/14 |
Laboratory
3: |
|
Flip-flops
and
Registers |
| 10/19, 10/21 |
Lab. 3 (continued) |
|
|
|
10/26, 10/28 |
Laboratory
4: |
|
Sequential logic
design using
ABEL HDL |
| 11/02, 11/04 |
Lab. 4 (continued) |
|
|
|
11/09, 11/11 |
Laboratory
5: |
|
Arithmetic and
Logic Unit design |
|
11/16, 11/18 |
Lab. 5 (continued) |